2024.12.23-2024.12.29 学习内容

简单测试原有的补充是否正确。

1、InstType验证

1.1 仅支持向量的指令

• LD1

关于该指令，参考官方文档：LD1 (multiple structures)

关于多个寄存器的情况，参见之前博客的1.5 一些补充。

// No-Offset部分
ld1 {v0.8b}, [x0]
ld1 {v0.16b}, [x0]
ld1 {v0.4h}, [x0]
ld1 {v0.8h}, [x0]
ld1 {v0.2s}, [x0]
ld1 {v0.4s}, [x0]
ld1 {v0.1d}, [x0]
ld1 {v0.2d}, [x0]
// Post-index部分
ld1 {v0.8b}, [x0], #8
ld1 {v0.16b}, [x0], #16
ld1 {v0.4h}, [x0], #8
ld1 {v0.8h}, [x0], #16
ld1 {v0.2s}, [x0], #8
ld1 {v0.4s}, [x0], #16
ld1 {v0.1d}, [x0], #8
ld1 {v0.2d}, [x0], #16

• LD2

关于该指令，参考官方文档：LD2 (multiple structures)

// No-Offset部分
ld2 {v0.8b, v1.8b}, [x0]
ld2 {v0.16b, v1.16b}, [x0]
ld2 {v0.4h, v1.4h}, [x0]
ld2 {v0.8h, v1.8h}, [x0]
ld2 {v0.2s, v1.2s}, [x0]
ld2 {v0.4s, v1.4s}, [x0]
ld2 {v0.2d, v1.2d}, [x0]
// Post-index部分
ld2 {v0.8b, v1.8b}, [x0], #16
ld2 {v0.16b, v1.16b}, [x0], #32
ld2 {v0.4h, v1.4h}, [x0], #16
ld2 {v0.8h, v1.8h}, [x0], #32
ld2 {v0.2s, v1.2s}, [x0], #16
ld2 {v0.4s, v1.4s}, [x0], #32
ld2 {v0.2d, v1.2d}, [x0], #32

• LD3

关于该指令，参考官方文档：LD3 (multiple structures))

// No-Offset部分
ld3 {v0.8b, v1.8b, v2.8b}, [x0]
ld3 {v0.16b, v1.16b, v2.16b}, [x0]
ld3 {v0.4h, v1.4h, v2.4h}, [x0]
ld3 {v0.8h, v1.8h, v2.8h}, [x0]
ld3 {v0.2s, v1.2s, v2.2s}, [x0]
ld3 {v0.4s, v1.4s, v2.4s}, [x0]
ld3 {v0.2d, v1.2d, v2.2d}, [x0]

// Post-index部分
ld3 {v0.8b, v1.8b, v2.8b}, [x0], #24
ld3 {v0.16b, v1.16b, v2.16b}, [x0], #48
ld3 {v0.4h, v1.4h, v2.4h}, [x0], #24
ld3 {v0.8h, v1.8h, v2.8h}, [x0], #48
ld3 {v0.2s, v1.2s, v2.2s}, [x0], #24
ld3 {v0.4s, v1.4s, v2.4s}, [x0], #48
ld3 {v0.2d, v1.2d, v2.2d}, [x0], #48

• LD4

关于该指令，参考官方文档：LD4 (multiple structures))

// Post-index部分
ld4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0]
ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0]
ld4 {v0.4h, v1.4h, v2.4h, v3.4h}, [x0]
ld4 {v0.8h, v1.8h, v2.8h, v3.8h}, [x0]
ld4 {v0.2s, v1.2s, v2.2s, v3.2s}, [x0]
ld4 {v0.4s, v1.4s, v2.4s, v3.4s}, [x0]
ld4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0]

// Post-index部分
ld4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], #32
ld4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #64
ld4 {v0.4h, v1.4h, v2.4h, v3.4h}, [x0], #32
ld4 {v0.8h, v1.8h, v2.8h, v3.8h}, [x0], #64
ld4 {v0.2s, v1.2s, v2.2s, v3.2s}, [x0], #32
ld4 {v0.4s, v1.4s, v2.4s, v3.4s}, [x0], #64
ld4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #64

• LD1R

关于该指令，参考官方文档：LD1R

// Post-index部分
ld1r {v0.8b}, [x0]
ld1r {v0.16b}, [x0]
ld1r {v0.4h}, [x0]
ld1r {v0.8h}, [x0]
ld1r {v0.2s}, [x0]
ld1r {v0.4s}, [x0]
ld1r {v0.1d}, [x0]
ld1r {v0.2d}, [x0]

// Post-index部分
ld1r {v0.8b}, [x0], #1
ld1r {v0.16b}, [x0], #1
ld1r {v0.4h}, [x0], #2
ld1r {v0.8h}, [x0], #2
ld1r {v0.2s}, [x0], #4
ld1r {v0.4s}, [x0], #4
ld1r {v0.1d}, [x0], #8
ld1r {v0.2d}, [x0], #8

• LD2R

关于该指令，参考官方文档：LD2R

// No-Offset部分
ld2r {v0.8b, v1.8b}, [x0]
ld2r {v0.16b, v1.16b}, [x0]
ld2r {v0.4h, v1.4h}, [x0]
ld2r {v0.8h, v1.8h}, [x0]
ld2r {v0.2s, v1.2s}, [x0]
ld2r {v0.4s, v1.4s}, [x0]
ld2r {v0.1d, v1.1d}, [x0]
ld2r {v0.2d, v1.2d}, [x0]

// Post-index部分
ld2r {v0.8b, v1.8b}, [x0], #2
ld2r {v0.16b, v1.16b}, [x0], #2
ld2r {v0.4h, v1.4h}, [x0], #4
ld2r {v0.8h, v1.8h}, [x0], #4
ld2r {v0.2s, v1.2s}, [x0], #8
ld2r {v0.4s, v1.4s}, [x0], #8
ld2r {v0.1d, v1.1d}, [x0], #16
ld2r {v0.2d, v1.2d}, [x0], #16

• LD3R

关于该指令，参考官方文档：LD3R

// No-Offset部分
ld3r {v0.8b, v1.8b, v2.8b}, [x0]
ld3r {v0.16b, v1.16b, v2.16b}, [x0]
ld3r {v0.4h, v1.4h, v2.4h}, [x0]
ld3r {v0.8h, v1.8h, v2.8h}, [x0]
ld3r {v0.2s, v1.2s, v2.2s}, [x0]
ld3r {v0.4s, v1.4s, v2.4s}, [x0]
ld3r {v0.1d, v1.1d, v2.1d}, [x0]
ld3r {v0.2d, v1.2d, v2.2d}, [x0]

// Post-index部分
ld3r {v0.8b, v1.8b, v2.8b}, [x0], #3
ld3r {v0.16b, v1.16b, v2.16b}, [x0], #3
ld3r {v0.4h, v1.4h, v2.4h}, [x0], #6
ld3r {v0.8h, v1.8h, v2.8h}, [x0], #6
ld3r {v0.2s, v1.2s, v2.2s}, [x0], #12
ld3r {v0.4s, v1.4s, v2.4s}, [x0], #12
ld3r {v0.1d, v1.1d, v2.1d}, [x0], #24
ld3r {v0.2d, v1.2d, v2.2d}, [x0], #24

• LD4R

关于该指令，参考官方文档：LD4R

// No-Offset部分
ld4r {v0.8b, v1.8b, v2.8b, v3.8b}, [x0]
ld4r {v0.16b, v1.16b, v2.16b, v3.16b}, [x0]
ld4r {v0.4h, v1.4h, v2.4h, v3.4h}, [x0]
ld4r {v0.8h, v1.8h, v2.8h, v3.8h}, [x0]
ld4r {v0.2s, v1.2s, v2.2s, v3.2s}, [x0]
ld4r {v0.4s, v1.4s, v2.4s, v3.4s}, [x0]
ld4r {v0.1d, v1.1d, v2.1d, v3.1d}, [x0]
ld4r {v0.2d, v1.2d, v2.2d, v3.2d}, [x0]

// Post-index部分
ld4r {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], #4
ld4r {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #4
ld4r {v0.4h, v1.4h, v2.4h, v3.4h}, [x0], #8
ld4r {v0.8h, v1.8h, v2.8h, v3.8h}, [x0], #8
ld4r {v0.2s, v1.2s, v2.2s, v3.2s}, [x0], #16
ld4r {v0.4s, v1.4s, v2.4s, v3.4s}, [x0], #16
ld4r {v0.1d, v1.1d, v2.1d, v3.1d}, [x0], #32
ld4r {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #32

• ST1

关于该指令，参考官方文档：ST1 (multiple structures))

// No-Offset部分
st1 {v0.8b}, [x0]
st1 {v0.16b}, [x0]
st1 {v0.4h}, [x0]
st1 {v0.8h}, [x0]
st1 {v0.2s}, [x0]
st1 {v0.4s}, [x0]
st1 {v0.1d}, [x0]
st1 {v0.2d}, [x0]

// Post-index部分
st1 {v0.8b}, [x0], #8
st1 {v0.16b}, [x0], #16
st1 {v0.4h}, [x0], #8
st1 {v0.8h}, [x0], #16
st1 {v0.2s}, [x0], #8
st1 {v0.4s}, [x0], #16
st1 {v0.1d}, [x0], #8
st1 {v0.2d}, [x0], #16

• ST2

关于该指令，参考官方文档：ST2 (multiple structures)

// No-Offset部分
st2 {v0.8b, v1.8b}, [x0]
st2 {v0.16b, v1.16b}, [x0]
st2 {v0.4h, v1.4h}, [x0]
st2 {v0.8h, v1.8h}, [x0]
st2 {v0.2s, v1.2s}, [x0]
st2 {v0.4s, v1.4s}, [x0]
st2 {v0.2d, v1.2d}, [x0]

// Post-index部分
st2 {v0.8b, v1.8b}, [x0], #16
st2 {v0.16b, v1.16b}, [x0], #32
st2 {v0.4h, v1.4h}, [x0], #16
st2 {v0.8h, v1.8h}, [x0], #32
st2 {v0.2s, v1.2s}, [x0], #16
st2 {v0.4s, v1.4s}, [x0], #32
st2 {v0.2d, v1.2d}, [x0], #32

• ST3

关于该指令，参考官方文档：ST3 (multiple structures))

// No-Offset部分
st3 {v0.8b, v1.8b, v2.8b}, [x0]
st3 {v0.16b, v1.16b, v2.16b}, [x0]
st3 {v0.4h, v1.4h, v2.4h}, [x0]
st3 {v0.8h, v1.8h, v2.8h}, [x0]
st3 {v0.2s, v1.2s, v2.2s}, [x0]
st3 {v0.4s, v1.4s, v2.4s}, [x0]
st3 {v0.2d, v1.2d, v2.2d}, [x0]

// Post-index部分
st3 {v0.8b, v1.8b, v2.8b}, [x0], #24
st3 {v0.16b, v1.16b, v2.16b}, [x0], #48
st3 {v0.4h, v1.4h, v2.4h}, [x0], #24
st3 {v0.8h, v1.8h, v2.8h}, [x0], #48
st3 {v0.2s, v1.2s, v2.2s}, [x0], #24
st3 {v0.4s, v1.4s, v2.4s}, [x0], #48
st3 {v0.2d, v1.2d, v2.2d}, [x0], #48

• ST4

关于该指令，参考官方文档：ST4 (multiple structures))

// No-Offset部分
st4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0]
st4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0]
st4 {v0.4h, v1.4h, v2.4h, v3.4h}, [x0]
st4 {v0.8h, v1.8h, v2.8h, v3.8h}, [x0]
st4 {v0.2s, v1.2s, v2.2s, v3.2s}, [x0]
st4 {v0.4s, v1.4s, v2.4s, v3.4s}, [x0]
st4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0]

// Post-index部分
st4 {v0.8b, v1.8b, v2.8b, v3.8b}, [x0], #32
st4 {v0.16b, v1.16b, v2.16b, v3.16b}, [x0], #64
st4 {v0.4h, v1.4h, v2.4h, v3.4h}, [x0], #32
st4 {v0.8h, v1.8h, v2.8h, v3.8h}, [x0], #64
st4 {v0.2s, v1.2s, v2.2s, v3.2s}, [x0], #32
st4 {v0.4s, v1.4s, v2.4s, v3.4s}, [x0], #64
st4 {v0.2d, v1.2d, v2.2d, v3.2d}, [x0], #64

1.2 支持标量与向量的指令

• ldnp

关于该指令，参考官方文档：LDNP (SIMD&FP)

// LDNP指令示例
ldnp v0, v1, [x0, #-1024]
ldnp v0, v1, [x0, #-1008]

ldnp d0, d1, [x0, #-512]
ldnp d0, d1, [x0, #-504]

ldnp s0, s1, [x0, #-256]
ldnp s0, s1, [x0, #-252]

• ldp

关于该指令，参考官方文档：LDP (SIMD&FP)

// Post-index
ldp s0, s1, [x0], #-256
ldp s0, s1, [x0], #-252
ldp s0, s1, [x0], #-248

ldp d0, d1, [x0], #-512
ldp d0, d1, [x0], #-504
ldp d0, d1, [x0], #-496

ldp v0, v1, [x0], #-1024
ldp v0, v1, [x0], #-1008
ldp v0, v1, [x0], #-992

// Pre-index
ldp s0, s1, [x0, #-256]!
ldp s0, s1, [x0, #-252]!
ldp s0, s1, [x0, #-248]!

ldp d0, d1, [x0, #-512]!
ldp d0, d1, [x0, #-504]!
ldp d0, d1, [x0, #-496]!

ldp v0, v1, [x0, #-1024]!
ldp v0, v1, [x0, #-1008]!
ldp v0, v1, [x0, #-992]!

// Signed offset
ldp s0, s1, [x0, #-256]
ldp s0, s1, [x0, #-252]
ldp s0, s1, [x0, #-248]

ldp d0, d1, [x0, #-512]
ldp d0, d1, [x0, #-504]
ldp d0, d1, [x0, #-496]

ldp v0, v1, [x0, #-1024]
ldp v0, v1, [x0, #-1008]
ldp v0, v1, [x0, #-992]

• ldr

关于该指令，参考官方文档：LDR (vector)、LDR (immediate, SIMD&FP)

我们先暂时只补充第二种的InstType。

// Post-index
ldr b0, [x0], #-256
ldr b0, [x0], #-255
ldr b0, [x0], #-254

ldr h0, [x0], #-256
ldr h0, [x0], #-255
ldr h0, [x0], #-254

ldr s0, [x0], #-256
ldr s0, [x0], #-255
ldr s0, [x0], #-254

ldr d0, [x0], #-256
ldr d0, [x0], #-255
ldr d0, [x0], #-254

ldr v0, [x0], #-256
ldr v0, [x0], #-255
ldr v0, [x0], #-254

// Pre-index
ldr b0, [x0, #-256]!
ldr b0, [x0, #-255]!
ldr b0, [x0, #-254]!

ldr h0, [x0, #-256]!
ldr h0, [x0, #-255]!
ldr h0, [x0, #-254]!

ldr s0, [x0, #-256]!
ldr s0, [x0, #-255]!
ldr s0, [x0, #-254]!

ldr d0, [x0, #-256]!
ldr d0, [x0, #-255]!
ldr d0, [x0, #-254]!

ldr v0, [x0, #-256]!
ldr v0, [x0, #-255]!
ldr v0, [x0, #-254]!

// Unsigned offset
ldr b0, [x0, #0]
ldr b0, [x0, #1]
ldr b0, [x0, #2]

ldr h0, [x0, #0]
ldr h0, [x0, #2]
ldr h0, [x0, #4]

ldr s0, [x0, #0]
ldr s0, [x0, #4]
ldr s0, [x0, #8]

ldr d0, [x0, #0]
ldr d0, [x0, #8]
ldr d0, [x0, #16]

ldr v0, [x0, #0]
ldr v0, [x0, #16]
ldr v0, [x0, #32]

• ldur

关于该指令，参考官方文档：LDUR (SIMD&FP)

// Signed offset
ldur b0, [x0, #-256]
ldur b0, [x0, #-255]
ldur b0, [x0, #-254]

ldur h0, [x0, #-256]
ldur h0, [x0, #-255]
ldur h0, [x0, #-254]

ldur s0, [x0, #-256]
ldur s0, [x0, #-255]
ldur s0, [x0, #-254]

ldur d0, [x0, #-256]
ldur d0, [x0, #-255]
ldur d0, [x0, #-254]

ldur v0, [x0, #-256]
ldur v0, [x0, #-255]
ldur v0, [x0, #-254]

• stnp

关于该指令，参考官方文档：STNP (SIMD&FP)

// STNP指令示例
stnp s0, s1, [x0, #-256]
stnp s0, s1, [x0, #-252]
stnp s0, s1, [x0, #-248]

stnp d0, d1, [x0, #-512]
stnp d0, d1, [x0, #-504]
stnp d0, d1, [x0, #-496]

stnp v0, v1, [x0, #-1024]
stnp v0, v1, [x0, #-1008]
stnp v0, v1, [x0, #-992]

• stp

关于该指令，参考官方文档：STP (SIMD&FP)

// Post-index
stp s0, s1, [x0], #-256
stp s0, s1, [x0], #-252
stp s0, s1, [x0], #-248

stp d0, d1, [x0], #-512
stp d0, d1, [x0], #-504
stp d0, d1, [x0], #-496

stp v0, v1, [x0], #-1024
stp v0, v1, [x0], #-1008
stp v0, v1, [x0], #-992

// Pre-index
stp s0, s1, [x0, #-256]!
stp s0, s1, [x0, #-252]!
stp s0, s1, [x0, #-248]!

stp d0, d1, [x0, #-512]!
stp d0, d1, [x0, #-504]!
stp d0, d1, [x0, #-496]!

stp v0, v1, [x0, #-1024]!
stp v0, v1, [x0, #-1008]!
stp v0, v1, [x0, #-992]!

// Signed offset
stp s0, s1, [x0, #-256]
stp s0, s1, [x0, #-252]
stp s0, s1, [x0, #-248]

stp d0, d1, [x0, #-512]
stp d0, d1, [x0, #-504]
stp d0, d1, [x0, #-496]

stp v0, v1, [x0, #-1024]
stp v0, v1, [x0, #-1008]
stp v0, v1, [x0, #-992]

• str

关于该指令，参考官方文档：STR (vector)、STR (immediate, SIMD&FP)

这里也先只补充第二种类型。

// Post-index
str b0, [x0], #-256
str b0, [x0], #-255
str b0, [x0], #-254

str h0, [x0], #-256
str h0, [x0], #-255
str h0, [x0], #-254

str s0, [x0], #-256
str s0, [x0], #-255
str s0, [x0], #-254

str d0, [x0], #-256
str d0, [x0], #-255
str d0, [x0], #-254

str v0, [x0], #-256
str v0, [x0], #-255
str v0, [x0], #-254

// Pre-index
str b0, [x0, #-256]!
str b0, [x0, #-255]!
str b0, [x0, #-254]!

str h0, [x0, #-256]!
str h0, [x0, #-255]!
str h0, [x0, #-254]!

str s0, [x0, #-256]!
str s0, [x0, #-255]!
str s0, [x0, #-254]!

str d0, [x0, #-256]!
str d0, [x0, #-255]!
str d0, [x0, #-254]!

str v0, [x0, #-256]!
str v0, [x0, #-255]!
str v0, [x0, #-254]!

// Unsigned offset
str b0, [x0, #0]
str b0, [x0, #1]
str b0, [x0, #2]

str h0, [x0, #0]
str h0, [x0, #2]
str h0, [x0, #4]

str s0, [x0, #0]
str s0, [x0, #4]
str s0, [x0, #8]

str d0, [x0, #0]
str d0, [x0, #8]
str d0, [x0, #16]

str v0, [x0, #0]
str v0, [x0, #16]
str v0, [x0, #32]

• stur

关于该指令，参考官方文档：STUR (SIMD&FP)

// Signed offset
stur b0, [x0, #-256]
stur b0, [x0, #-255]
stur b0, [x0, #-254]

stur h0, [x0, #-256]
stur h0, [x0, #-255]
stur h0, [x0, #-254]

stur s0, [x0, #-256]
stur s0, [x0, #-255]
stur s0, [x0, #-254]

stur d0, [x0, #-256]
stur d0, [x0, #-255]
stur d0, [x0, #-254]

stur v0, [x0, #-256]
stur v0, [x0, #-255]
stur v0, [x0, #-254]

2、 修正对”{“和”}”的处理逻辑

考虑在aarch64.g4中进行处理，不修改REGISTER_VEC或者REGISTER的定义，而是对每一条类似ld1指令进行修改，即修改为：

    // 以下为SIMD且访存且仅使用Vec的指令。部分既可以使用Gp也可以使用Vec在前文已经定义
    | 'ld1'  '{' REGISTER '}' ',' mem
    | 'ld1'  '{' REGISTER ',' REGISTER '}' ',' mem
    | 'ld1'  '{' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem
    | 'ld1'  '{' REGISTER ',' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem
    | 'ld1r' '{' REGISTER ',' '}' mem
    | 'ld2'  '{' REGISTER ',' REGISTER '}' ',' mem
    | 'ld2r' '{' REGISTER ',' REGISTER '}' ',' mem
    | 'ld3'  '{' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem
    | 'ld3r' '{' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem
    | 'ld4'  '{' REGISTER ',' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem
    | 'ld4r' '{' REGISTER ',' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem
    | 'st1'  '{' REGISTER '}' ',' mem
    | 'st1'  '{' REGISTER ',' REGISTER '}' ',' mem
    | 'st1'  '{' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem
    | 'st1'  '{' REGISTER ',' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem
    | 'st2'  '{' REGISTER ',' REGISTER '}' ',' mem
    | 'st3'  '{' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem
    | 'st4'  '{' REGISTER ',' REGISTER ',' REGISTER ',' REGISTER '}' ',' mem

这样之后，也可以把之前在语法分析之后的解析阶段添加的lambda函数给删掉了。